Typically, each processor of a multi-node network of embedded systems employing processors has a high speed RAM (Random Access Memory) for storing a code image which, when executed, operates the processor. An example of an embedded system having a plurality of modules with processors at nodes of the system, comprises an automated data storage library, which stores removable data storage media in storage shelves, which has a plurality of data storage drives to read and/or write data on the data storage media, and which has at least one robot to transport the data storage media between the storage shelves and the data storage drives, with processors at the modules to operate the library, and with a network to couple the modules of the embedded library system. Such a library system may comprise a hundred or more data storage drive processors and tens of library processors. It can become a real challenge to maintain consistent code levels in a network of a large number of nodes.
Some multi-node networks, such as LANs (Local Area Networks), are employed for coupling together a number of like components, such as PCs (Personal Computers), with peripheral devices, such as printers. In at least one instance, such as discussed by U.S. Pat. No. 5,815,722, executable code files for the specific devices may be updated by downloading directly to RAM. In the patent, a communication program operates to broadcast an inquiry on the LAN to a specific network board, to receive location information of the designated board, e.g., of a printer. The executable file is then directly downloaded into RAM on the designated board through the LAN. However, to prevent loss of the executable code when any of the devices or boards is powered off, the RAM is non-volatile (called NVRAM).
The executable code for printers and similar devices is exceptionally small, requiring only a very small NVRAM. In more major systems, such as automated data storage libraries, a module processor may comprise a processor of the power of a workstation or PC, and the executable code for each module processor is quite large.
As a result, typically, each processor of a multi-node network has a PROM (Programmable Read-Only Memory) or a ROM (Read-Only Memory), which stores a power-on sequence, and which must store a copy of the code image to prevent loss. A power-on sequence for any of the modules of an embedded system involves the execution of power-on code that is stored in the PROM or ROM device, where a module may comprise an assembly, subassembly or a circuit board. The code may first test the components of the module, and then may transfer the code image to the faster RAM.
Thus, the need for both NVRAMs, PROMs or ROMs and a fast RAM is very expensive. The requirement that a PROM or ROM have sufficient capacity to store the code image for the associated RAM, or that a NVRAM be used, adds significantly to the expense of each module. When multiplied by a high number of modules, the expense can become a significant factor in the cost of the full system. Further, should a code image be updated, failures of the update process are not uncommon, for example, if power is lost during a code update, and may even cripple the node entirely.